Simulation experiments with LT-Spice…
Yesterday, I mentioned Rory’s excellent introduction and exploration into DTL logic. He covers some of the basics here, including circuits for all the basic gates: AND, OR, NOT and NAND. The AND and OR gates are interesting, because they consist entirely of diodes and resistors. They do have the drawback that they are “lossy” (the technical term is non-regenerative). They experience a voltage drop across them, so they can’t be cascaded forever, as the voltage drop continues with each gate, and they ultimately lose the ability to compute effectively. The NOT and NAND gates on the other hand use a typical bipolar NPN transistor, and use the amplifying capability of transistors to regenerate the signal.
I was interested in a couple of things about the circuit though, so I fired up LTSpice for a little computational experiment.
I have played around with simple inverters like this one, which Rory mentioned which I always thought of as an effective inverter. But Rory mentioned that it was unable to run at higher speed (say, around 1Mhz). I was also interested in how the choice of diode affected the circuit.
So, I built it. Rory used BAT42 Schottky diodes, which weren’t in my component catalog, so instead I substituted a 1N5818 diode.
And sure enough, it works pretty darn well. I coded up a 500kHz clock, and the output looks pretty clean. I fed it two pulse trains one delayed with the other, and it looks pretty good.
If you substitute some of the cheap diodes I have on my bench (like a 1N914 or a 1N4148) you can see that it works pretty well at frequencies around 1000Hz, but fails miserably at frequencies of 1Mhz. Ditto for the simplified inverter circuit we looked at above: it simply can’t function at 500khz. Superimposed with the NAND pulse train, here is the output of the simplified inverter wired to InputA. As you can see, the input pulses just turn into a feeble triangle wave.
I suspect that thinking about why this is will lead me to a much more robust understanding of transistors.