I was reading up on resistor ladder DAC circuits on Wikipedia, and came across the Unequal Resistor R-2R Ladder Optimizer. It’s very neat! You can enter the number of bits you need, and the values of the pile of resistors that you have measured from your bench, and it will produce an optimized design using those values. When you are making an 8 bit DAC, the normal variation in a 5% tolerance (or even a 1% tolerance) can cascade to keep you from being entirely linear, or even monotonic, so doing this optimization seems enormously practical. As a bonus, once you have your DAC simulated using the Falstad Circuit Simulator, which is itself an enormously cool thing: a Java based circuit simulator that can accept new models encoded on the URL! Paul Falstad has a huge number of other cool educational Java applets, check it out!