An anonymous commenter suggested that I look at logisim, a circuit simulator written in Java. It has many nice features. For instance, you can specify a combinatorial circuit either as a truth table or as equations, and it will convert to the other representation (in minimized forms) and will also build a circuit to implement those equations. You can tell it to use only 2 input gates, or even to use only NAND gates, and it will layout a little circuit to implement it.

For instance, I entered the truth table for a full adder, and told it just to use 2 input NAND gates. The resulting (29 gates? I didn’t count carefully) 1 bit full adder emerged as a circuit:

Pretty neat. I am not sure that logisim is quite good enough to design an actual, physical CPU (it doesn’t model propagation delays, as far as I can tell) but it’s a very good tool to exercise your nascent digital design skills. Check it out.

Continuing my obsession with reading up on homebrew CPU projects, I found this incredible blog. Instead of just presenting the completed design, Dawid has presented intermediate posts about his project in progress, detailing some of the choices and techniques he had to make along the way. As is true of most projects like this, it’s hard to know how to get started and gain enough traction to make progress, and details like this can be really helpful and really inspiring.

DIY Computer Project

Addendum: For instance, I’ve been considering writing a gate level simulator (writing code is something I feel comfortable doing) rather than spending huge amounts of time learning Verilog or VHDL. It is somewhat reassuring that Dawid apparently did the same thing. Very interesting.

Yep, been spending some time thinking about homebrew computer architectures. I’ve also been reading Gordon Bell’s Computer Engineering, pondering some of the older and earlier computing architectures. Caxton Foster’s Computer Architecture describes a simple computer architecture called “Blue”, which has only 16 instructions, and uses only direct addressing. It’s a pretty primitive machine (more like a PDP-8’s out of work cousin), but in 30 pages, Foster describes pretty much the complete circuitry needed to implement the machine. I thought I’d write a simple behavoral simulator just to play with, and to see how much of a pain it is to program (answer: pretty big). For now, here’s the code. More later.

[sourcecode lang=”C”]#include <stdio.h>
#include <stdlib.h>

/* _ _
* | |__| |___ ___
* | ‘_ \ / _ \/ _ \
* |_.__/_\___/\___/
*
* An implementation of the simplest version of Caxton Foster’s "Blue"
* machine as described in his book _Computer Architecture_, Third
* Edition, Copyright 1985. Just meant to stimulate some experimentation.
*
* The architecture described is _very_ simple, consisting of just sixteen
* instructions, a single accumulator, no CPU flags like carry or overflow,
* and only direct addressing. This makes programming pretty annoying,
* virtually requiring self-modifying code to do anything non-trivial.
* But in 30 pages, Foster presents pretty much the entire architecture,
* which made me spend 15 minutes to code up a simple behavioral simulator
* and play around with it.
*/

typedef unsigned short Word ;

#define MEMSIZE 4096

Word M[MEMSIZE] = {
0x600C,
0x100B,
0x9004,
0x0000,
0x700C,
0x6008,
0x100B,
0x7008,
0x600C,
0xC000,
0xA000,
1,
-13,
‘H’,
‘e’,
‘l’,
‘l’,
‘o’,
‘ ‘,
‘W’,
‘o’,
‘r’,
‘l’,
‘d’,
‘!’,
‘\n’
} ;

Word A ;
Word Z ;
Word MAR ;
Word MBR ;
Word PC ;
Word IR ;
Word CS ;

void
fetch()
{
Word t ;

/* fprintf(stderr, "… 0x%04x ", PC) ; */
IR = M[PC] ;
PC ++ ;
PC &= (MEMSIZE-1) ;
}

void
execute()
{
int op = IR >> 12 ;
int addr = IR & 0xfff ;

/* fprintf(stderr, "%0x %03x\n", op, addr) ; */

switch (op) {
case 0: /* HLT */
fprintf(stderr, "\n… bloo executed HLT.\n") ;
exit(0) ;
case 1: /* ADD */
A += M[addr] ;
break ;
case 2: /* XOR */
A ^= M[addr] ;
break ;
case 3: /* AND */
A &= M[addr] ;
break ;
case 4: /* OR */
A |= M[addr] ;
break ;
case 5: /* NOT */
A ^= 0xFFFF ;
break ;
case 6: /* LDA */
A = M[addr] ;
break ;
case 7: /* STA */
M[addr] = A ;
break ;
case 8: /* SRJ */
A = PC & 0xFFF ;
PC = addr ;
break ;
case 9: /* JMA */
if (A&0x8000)
PC = addr ;
break ;
case 0xA: /* JMP */
PC = addr ;
break ;
case 0xB: /* INP */
A = getchar() ;
break ;
case 0xC: /* OUT */
putchar(A) ;
fflush(stdout) ;
break ;
case 0xD: /* RAL */
if (A & 0x8000)
A = (A << 1) | 1 ;
else
A = (A << 1) ;
break ;
case 0xE: /* CSA */
A = CS ;
break ;
case 0xF: /* NOP */
break ;
}
}

int
main(int argc, char *argv[])
{
for (;;) {
fetch() ;
execute() ;
}
return 0 ;
}

[/sourcecode]

Just another link to inspire me in my glacial moves toward designing a CPU of my own:

The D16/M is a general-purpose, stored-program, single-address, 16-bit digital computer using two’s complement arithmetic. It manages subroutine calls and interrupts using a memory stack. The processor may directly address 64K words of memory or I/O. Its timing and control unit is microprogrammed (fully horizontal, with a 72-bit control word).

John Doran’s D16

Dieter Muller has an amazingly interesting collection of interesting ideas about building homebrew cpus with TTL logic. I’m sure to old school logic designers, most of these are old hat, but to the nearly crazed home experimenter, they are quite illuminating. His hints on ALU design are what brought me to the site, so I’m leaving this breadcrumb on my blog so I can find it again easily.

Dieter’s Homepage..

In a previous blog post about a year ago, I pointed you at Jack Eisenmann’s 4 bit computer built from TTL chips. It was cool, made entirely on breadboards tucked away inside a big plastic container. Or, I used to think it was cool, until I saw what he’s been up to: an 8 bit computer, complete with video interface. All done on an ungodly number of breadboards. It takes a certain kind of obsessive lunacy to make one of these, and I can appreciate it.

His web page detailing the Duo Adept..